HPR4614: Dauug|18: Faster Than a ’286, but Inspectable Like a Soroban

This show has been flagged as Clean by the host.

In this show, Marc Abel presents an introduction to Dauug|18, an 18-bit controller developed by The Dauug House. About the size of a postcard, Dauug|18 avoids the use of complex VLSI such as microprocessors, FPGAs, PLDs, ASICs, and DRAM. Instead, the architecture is built from trivial glue logic and synchronous static RAM, using components that can be hand-soldered and verified for connectivity after assembly.

The motivation for Dauug|18 is to provide refuge in situations where transparency, auditability, and supply chain integrity are priorities. Rather than relying on high-integration silicon, Dauug|18 is auditable at the logic-gate level, allowing owners to verify the integrity of their hardware.

This show covers key architectural details, the decision to use SRAM for both memory and logic, and system constraints that stem from Dauug|18's brutal simplicity, limited component selection, and succinctness. The practical effect of these constraints on programming Dauug|18 is also discussed in detail.

Anticipated uses for Dauug|18 include privacy assertion, critical infrastructure, and curricula for fields relating to computer engineering.

Files supplied with this show include a short PDF of Dauug|18 architectural details, as well as word-accurate, spell-checked subtitles and their matching transcript.

More information, technical documentation, and updates on related projects like Dauug|36 can be found at https://dauug.org.

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